Features
MiDAS3.0-Family
CPU
- 8-bit Turbo 80C52 Architecture
- 4 Cycles / 1 Machine Cycle.
- Pin/Instruction Level Compatible with Intel 80C52
62k Bytes On-chip FLASH ROM
- ISP by Serial Interface
- IAP and Virtual EEPROM for Data (2k Bytes)
16k Bytes On-chip RAM
- 256 Bytes IRAM
- 16,384 Bytes AUXRAM (Accessed with MOVX)
Max. 32 Programmable I/O Pins (for
44-MQFP)
- Open-drain Intel Compatible Port : P0
- Quasi-bidirectional Intel Compatible Ports : P1~P3
- Push-pull Type Ports : P0~P3
- Input/Output & Pull-up Control : P0~P3
- TTL & CMOS Compatible Logic Levels : P0~P3
- All Ports are initialized during Power-on Reset
- EMI Reduction Mode : Inhibit ALE
- 27-bit Programmable Watchdog Timer
- 10-bit 32-channel ADC
- Three 16-bit Timer/Counters
- Two Full-duplexer UART
- Automatic Address Recognition
Two Programmable Counter Arrays
- 8-bit/16-bit Dynamic PWM (12 Channels)
- 16-bit Compare/Capture Counter (12 Channels)
- High Speed Output (12 Channels)
15 Interrupt Sources (with 6 External
Sources)
- Timer0/1/2, UART0/1, PCA0/1, WDT, ADC, & 6 External
- Four/Two-level Interrupt Priority
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Wake-up from Power-down Mode
- On-chip Power-on Reset
- External Reset
- External Interrupt 0/1/2/3/4/5
- WDT Interrupt or Reset
Reset Scheme
- On-chip Power-on Reset
- External Reset
- Low Voltage Detector Reset
- Watchdog Timer Reset if Enabled
Internal Delay for Power
Stabilization
- MCU starts after 50mse from Power-up.
On-chip PLL
- VCO Operation Frequency : 70MHz ~ 130MHz
- PFD Comparison Frequency : 2MHz ~ 20MHz
- Support 2 bits Output Divider, 2 bits Input Divider
- Support 8 bits Feedback Divider
Supply Voltage
- Core : 1.62V ~ 1.98V
- I/O : 1.62V ~ 3.6V
Operating Temperature: -20
- +85°C
Operating Frequency: Max.
100MHz using Internal PLL
Power Consumption
- Active Current : Typ. 50mA @1.8V, 100MHz
- Stop Current : Typ. 10uA @1.8V
Package: 44-PQFP/MQFP/LQFP,
32-LQFP/MLF
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