TCP/IP Chips + MCUs

Wiznet TCP-IP Hardwired Chips integrate to Layers 1 (PHY) and 2 (MAC) also Layers 3 and 4 (TCP/IP) of the Ethernet protocol on gate level. They support TCP, IPv4, UDP, ICMP, ARP, PPPoE and Multicast.

Wiznet Hardwired TCP/IP Chips are available in three Integration Stages:

• 2 in 1:                      TCP/IP + MAC
• 3 in 1:                      TCP/IP + MAC + PHY
• 4 in 1:  Controller + TCP/IP + MAC + PHY

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Wiznet's new W5100S is a TCP / IP hardwired Ethernet controller that provides cost-effective Ethernet connectivity through SPI and 8-bit interfaces. With the integration of TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE as well as MAC / PHY, you do not need a software stack and can connect sensors and IoT devices to networks with a simple SOCKET program with minimal software effort.